While most of the semiconductor trade publications wrapped up their 2013 prediction posts by mid January, Semiconductor Packaging News (SPN) forged on with its original annual Viewpoints series right up until last week. I spent some time pouring over the musings of industry executives’ contributions. Many discuss the proliferation of mobile devices driving technology requirements and 3D ICs as the solution, and the part their company is playing to bring 3DICs to commercialization.
Dan Donabedian, CEO, Ziptronix, reports that the message he came away from CES 2013 “is that consumers expect smartphones to be fast, powerful, versatile and small — and have a battery that lasts all day.” He talked about Ziptronix contribution to making this happen with its 3D wafer bonding processes, and progress with licensing to Tezzaron and Novati.
Talking about a shift in focus from PCs to handheld devices, Tim Olson, Deca Technologies, explains how electronic interconnect (EI) has failed to keep pace with the needs of system architects. He defines EI as “the nervous system of an electronic appliance. EI includes both chip-level wiring to connect functional blocks and system level elements such as semiconductor packaging, surface mount technology and printed circuit boards which provide the pathways between semiconductors, sensors and other devices.” He says 2.5D and 3D technologies are aimed “at the heart of this issue.”
On the other hand, Richard Crisp, VP and chief technologist, Invensas, notes that that contrary to popular belief, TSV technologies or Chip-on-Chip stacking are not the only way to achieve high bandwidth, memory-to-processor links. He writes “neither approach supports the preferred Package On Package (“POP”) stacking method and both are too immature and expensive to give confidence of the practicality of an annual multi-hundred million unit production ramp anytime soon.” He proposes a cheaper solution that leverages the existing infrastructure can be found in Invensas Bond Via Array (BVA) technology.
From the world of semiconductor packaging materials, Andy Mackie, senior product manager, Indium Corporation, weighed in on the delay for 3D IC adoption, citing two conflicts holding up progress as first, the “who owns the quality” business logistics issue, exacerbated by TSMCs vertically leveraged offering versus the open collaboration models; and second, the need for high process yield of low-cost reliable products and simple throughput considerations. He goes on to talk about Indium’s progress as a materials provider in this market space.
Weighing in on their companies’ respective readiness for 2.5D and 3DICs, Ricardo I. Fuentes, President/CEO, MATECH talks about tool upgrades to handle the tight requirements for wafer thinning processes, and James Quinn, VP Sales and Marketing of Multitest, talks about the growing complexity and increased requirements of test that comes with 3D ICs and what steps Multitest is taking to address those. Quinn notes that “early and intensive partnering with equipment suppliers to develop successful solutions will bear a significant competitive advantage.”
While that rounds out the references to 3D technologies in this year’s Viewpoints, there are lots more perspectives on the semiconductor industry here. (SPN does such a great job of pointing readers towards compelling content on a daily basis, I figured it was time to return the favor and point readers back.) ~ F.v.T.
