A few months back when Ziptronix first revealed details about its direct bond interconnect(DBI), CEO Dan Donabedian told me that one sign the market was ready for 3D integration processes was the demographic of attendees at conferences devoted to 3D IC packaging technologies. Rather than application and process engineers, he said, the seats are now occupied by marketing and business development people. So naturally that was the audience he targeted in his presentation at November’s 3-D Architectures for Semiconductor Integration and Packaging conference.
As we draw closer to adoption of these technologies, it’s important for all of us non-techies to get familiar these new processes, applications and market drivers. There are an assortment of upcoming events in the offering sessions and presentations on 3D.
SMTA’s Pan Pacific Microelectronics Symposium, Feb 10-12 on the island of Hawaii, offers a session on 3D assembly that I would suggest attending:
- System-on-Wafer by The 3D All System Silicon Systems Technology consortium (Georgia Tech, Fraunhofer IZM),
- Advanced Electrodeposition Technologies for 3D integration by Rozalia Beica and Paul Siblerud, Semitool, Inc.
- Copper Electroplating Process for Next Generation Core Through-via Filling Stephen Kenny and Bernd Roelfs, Atotech Deutschland GmbH. I also hear the Luau is not to be missed.Judging by the line-up at this year’s IMAPS International Device Packaging Symposium, the program organizers were on the ball with 3D topics. For example, a half-day professional course titled 3D Integration: Technology, Applications & Markets for 3D Integrated Circuits, lead by Phil Garrou of Microelectronics Consultants, is recommended for marketing and management people. As is the second half-day session lead by RPI’s James Jian-Qiang Lu titled 3D Integration and Packaging Technologies, Assessment, Status and Applications. And definitely don’t skip the And definitely don’t skip the 3D panel discussion: 3D Integration Technologies, Applications, and Roadmaps. There are also a plethora of sessions to choose from on TSV processes and other methods of 3D interconnect. It should be a great event. It was last year!
And finally,coming up in Nice, France on April 24th, Design Automation and Test in Europe (DATE) 2009 will tackle roadblocks to 3D adoption; process technology, architectures, esign methods and tools, and manufacturing test solutions. – F.V.T
