Georgia Tech’s Packaging Research Center, in its pioneering chip-last embedded interconnection technology, demonstrates World’s Thinnest 3D Organic Package at 130um thickness at 30um interconnection pitch using ultra-short copper-copper interconnections and bonding below 200oC for highest electrical performance.
The “Ultra-SLIM Packages have built-in vertical connections to the top surface of the package for package- on -package stacking using high- precision cavity embedding of thin Si and GaAs devices into ultra-thin organic modules with up to 1000 I/O routing capacity in 1-2 metal layers. Various RF passive components have also been embedded into the substrate layers of this novel chip-last integration scheme which also allows for intermediate testing after substrate fabrication and selective- site die embedding for improved yield management, compared to fan-out WLP and chip-first embedding.
First set of functional WLAN receiver modules fabricated using low- moisture and low- loss laminate materials from Zeon Corporation, Japan, one of PRC’s industry partners, has been recently measured, meeting all WLAN specifications in smallest form factor module at 130um thickness. Additional Georgia Tech PRC industry partners include Intel, Qualcomm, Infineon, Maxim and Namics.
Companies interested in this technology for RF, Power, Analog, MEMS/Sensors, and Mixed Signal Module Applications are encouraged to contact Mr. Nitesh Kumbhat at nitesh.kumbhat@prc.gatech.edu, +1 404-385-0730 or Prof. Rao Tummala at rao.tummala@prc.gatech.edu, +1 404-894-9097.
