For those of us who attended Doug Yu’s keynote address at the 3D Architectures for Semiconductor Integration and Packaging Conference in December, yesterday’s keynote at IMAPS DPC was, in the words of the immortal Yogi Berra, “déjà vu all over again”; driving home the message that yes, TSMC intends to provide full 2.5F and 3D service including chip design and fabrication, stacking and packaging. While he didn’t actually state TSMC’s intentions formally in his address titled “System Scaling Superhighway”, Yu, who is senior director of integrated interconnect and packaging, R&D at TSMC, outlined the key technologies that offer the best path to commercializing 3D integration technologies, with the implication that TSMC is well positioned to provide them all.
He extolled the virtues of copper, urging the industry to embrace copper, all the way from the transistor, IC component, and flip chip to subsystem. TSMC is well versed in the use of copper (Cu low-K dielectrics) in front end processes, and has a handle on such issues as etch, fill, O.D. and pop up issues. Yu also made a point to demonstrate the foundry’s capabilities in the back end.
“TSV is much more complex and challenging than ever before,” noted Yu. “There’s a new ballgame and a small window.” He said a conventional collaboration infrastructure is becoming harder. Integration must be simplified to reduce handling (who owns the mishandling?) and an investment beyond conventional back-end (in other words, middle-end-of-line tools and processes) is required. In short, Yu said a full spectrum of expertise is needed that includes manufacturing excellence, capacity and customer relationships where there is no competition with the customer (a thinly veiled reference to the Samsung/Apple relationship?) Lastly, he said it requires chip/package/subsystem co-design, and TSMC has this infrastructure in place. “The industry suppliers who can best leverage Cu interconnect technology expertise to provide simplified integration to manage the interfaces will win. They are the virtual superhighways,” concluded Yu.
It’s a strategy that appears to be almost impenetrable, until you consider the missing piece: Memory. Jan Vardaman posed the question that had to be asked: “TSMC does not make memory. When you talk about all the handling problems, who will handle the issues when you bring in memory from suppliers?” Yu’s response was that they are working with memory partners and partner customers on this matter.
When you put all this together with the unconfirmed rumor that TSMC will be supplying Apple’s next generation A6 processor rather than Samsung, and that processor will include 3D ICs, TSMCs strategy becomes a whole lot clearer. The question is, will other fabless customers jump on board, or will they prefer the flexibility offered by the collaboration model being promoted by the rest of the pure play foundries and OSATS? That, as they say, remains to be seen. – F.v.T.
