MonolithIC 3D Inc., a Silicon Valley startup, announced today that it has been issued its fifth patent on monolithic 3D-IC technology. The patent describes techniques to obtain low-cost monolithic 3D logic chips with single crystal silicon transistors and high vertical connectivity. In addition to the 5 issued patents, the company has more than 50 other patents pending, making it one of the key players in the 3D-IC field. MonolithIC 3D Inc. was recently selected as a Finalist of the “Best of Semicon West 2011” for its disruptive technology.
The issued patent, US Patent #8,058,137, describes techniques to utilize any gate-last transistor technology and get high-density through-silicon connections between stacked device layers. Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. said, “This patent, which we consider a fundamental one, provides manufacturers 10,000x higher vertical connectivity than state-of-the-art Through-Silicon Via (TSV) 3D technology.”
Since the 1960s, industry luminaries such as James Early have dreamt of chips where single crystal silicon transistors are constructed monolithically above Aluminum or Copper wiring layers. These could enable logic chips where components are arranged as a three-dimensional cube, making wires shorter and boosting chip performance. Unfortunately, high-quality transistors require temperatures higher than 900C for activating dopants in source and drain regions. Such temperatures are not compatible with pre-processed Aluminum or Copper wiring layers.
MonolithIC 3D Inc.’s issued patent presents a practical solution to this important problem. A gate-last process is used innovatively in combination with a breakthrough wafer-to-wafer alignment scheme. “The strength of this technology is the use of well-known materials, process steps and equipment”, notes Brian Cronquist, MonolithIC 3D Inc’s VP of Technology & IP. The company’s business model involves Intellectual Property (IP) Licensing to partners who then take the technology to manufacturing.
