SEMATECH announced that Advanced Semiconductor Engineering (ASE) Incorporated, Altera Corporation, Analog Devices Inc. (ADI), LSI Corporation, ON Semiconductor Corporation, and Qualcomm Incorporated have joined SEMATECH’s 3D Enablement program based at the College of Nanoscale Science and Engineering (CNSE) of the University at Albany. These leading semiconductor companies will join CNSE, GlobalFoundries, Hewlett Packard, Hynix, IBM, Intel, Samsung, and UMC to extend the program’s position as a broad, cohesive initiative and to enable industry-wide ecosystem readiness for cost effective TSV-based 3D stacked IC solutions.
As members, these program participants will work with SEMATECH researchers to contribute to the overall vision of the Enablement Center, which includes identification of critical needs for 3D technologies, and the development of path finding capabilities, EDA tools, and appropriate test vehicles.
“Research on 3D technologies has been ongoing for many years, and the initiative that SEMATECH has spearheaded is working to find solutions to the challenges faced by lack of standardization. We’re pleased to see this partnership expand and grow,” said Dan Armbrust, president and CEO of SEMATECH. “Thanks to these new members and our supplier partners, the 3D Enablement program truly has the potential to bring down the barriers to integrating chips for adoption of 3D technologies in high volume manufacturing.”
The tremendous advantages of 3D integration including higher performance, increased functionality, lower cost, and smaller chip size have drawn considerable attention from a wide variety of companies across the semiconductor industry. Despite its high potential, a lack of uniform standards and a limited maturity of key processes have prevented 3D technologies from being used for mainstream production.
In December 2010, SEMATECH, along with the Semiconductor Industry Association (SIA) and the Semiconductor Research Corporation (SRC), launched a new 3D Enablement program to drive industry standardization efforts and technical specifications for heterogeneous 3D integration.
As a first-of-its-kind effort, the 3D Enablement program aims to establish the infrastructure necessary for the entire industry to leverage 3D packaging technology for innovative new applications. The primary focus is on developing technologies and specifications necessary for establishing standards in critical areas such as inspection, metrology, microbumping, bonding and thin wafer, and die handling. Membership is open to international fabless, fab-lite and IDM companies, outsourced semiconductor assembly and test (OSAT) suppliers, and EDA process tool and materials suppliers. In addition, the program and its members are collaborating with a broad network of companies, consortia, universities, national laboratories, and associations from around the world.
