SEMATECH, the Semiconductor Industry Association (SIA), and Semiconductor Research Corporation (SRC) announced today they have established a new 3D Enablement program to drive cohesive industry standardization efforts and technical specifications for heterogeneous 3D integration. Administered by SEMATECH’s 3D Interconnect program, based at the College of Nanoscale Science and Engineering (CNSE) of the University at Albany, working in partnership with SRC, the program aims to establish the infrastructure necessary for the industry to leverage 3D packaging technology for innovative new applications.
The new 3D Enablement program, launched by a group of existing member companies in SIA and SEMATECH, will focus primarily on developing technologies and specifications necessary for establishing standards in critical areas such as inspection, metrology, microbumping, bonding and thin wafer and die handling. To achieve this SEMATECH will partner with SRC to enable select university research projects.
“This initiative underscores the importance of industry-wide convergence on infrastructure and standards. SEMATECH will leverage its existing 3D capabilities to lead a more collaborative approach to reduce risks and development costs for the participants,” said Dan Armbrust, president and CEO of SEMATECH. “The 3D Enablement program has been established to bring down the barriers to integrating chips from different suppliers for adoption of 3D technologies in high volume manufacturing.”
“The semiconductor industry, specifically the development of 3D integration, is at an inflection point,” said Dr. John E. Kelly III, senior vice president and director of research at IBM and chair of SIA’s technology steering committee. “In tackling the challenges faced by lack of standardization, we will have deep collaboration with SEMATECH and SRC addressing both bonding processes and 3D inspection. The program will accelerate the adoption of 3D integration technology.”
“The lack of convergence will delay industry success. The 3D Enablement program serves as a common ground to serve a broad industry base,” said Larry W. Sumney, president and CEO of SRC. “SRC has extensive university programs and expertise. Combined with SEMATECH’s existing efforts in developing 3D technologies, we will pursue an ambitious interface standardization for 3D integration to enable the commercialization of 3D ICs.”
3D ICs will play an important role in the semiconductor industry, given their potential to alleviate scaling limitations, increase performance and functionality, and reduce cost. While research on 3D technologies has been ongoing for many years, they have not yet made it to mainstream production due to lack of uniform standards and a limited understanding of key manufacturing parameters. In order to build critical industry infrastructure and drive 3D into mainstream high volume manufacturing, the industry will need to come to a consensus on the most promising and cost-effective options.
The program will address these industry infrastructure gaps in phases. First efforts will focus on developing the necessary standards and technical specifications, followed by planning activities to identify the key areas for developing design tools to support 3D chip design.
The program will address these industry infrastructure gaps in phases. First efforts will focus on developing the necessary standards and technical specifications, followed by planning activities to identify the key areas for developing design tools to support 3D chip design.
Designed to meet the needs of diverse business models, the 3D Enablement program is open to international fabless, fab-lite and IDM companies, outsourced assembly and test (OSAT) suppliers, and tool vendors.
