In an understated research lab and recently upgraded demo facility located just outside Paris in Massy, France, Alchimer scientists are working diligently to prove the readiness of an elegant and innovative electrochemical-based process for the growth of nanometric thin films of various types on both conducting and semiconducting surfaces. The technology has the potential to revolutionize process integration and cost models for 3D TSVs.
Outside the lab setting, the Alchimer executive team has been working equally hard to spread the word by releasing reliability data, demonstrating the process’s seemingly limitless capabilities with respect to aspect ratio and surface topography, modeling cost-competitive benefits, and just today, issuing results from a recent study that proves the cost savings aren’t just in the process itself, but in overall consumption of wafer real estate.
On the first stop during my Tour de France in 3D, I spent the day with the Alchimer team. We started with a progress report on Alchimer’s position in the market from CEO Steve Lerner, followed by a technology review from CTO Claudio Truzzi, just to make sure I fully understood how this family of processes works, and how it differentiates itself from standard dry processes. Later, I spent the afternoon touring the Massy facility, witnessing demos of each process step for isolation, barrier, and seed layer deposition at both coupon and wafer level, using industry-standard equipment with slight modifications to accommodate wet processes.
Progress is progress
A little background: A spinoff from CEA, the world-class French research institute, Alchimer has IP for the process as well as the chemistries. Although their business model is based on licensing that technology to users, they’ve also engaged in production of consumable materials, with an in-house capacity of 200 tons/year and a plan to eventually subcontract high‐volume production through partnerships with site-synergistic chemical suppliers. “We’re doing it on our own now so that we’re in control of our destiny,” says Lerner.
Alchimer’s high‐level scientists have backgrounds in surface science, chemistry, electrochemistry, physics, materials science, and semiconductors. “Our value is our scientists,” notes Lerner, rating them second to none in the world. Additionally, he says he can’t overemphasize how powerful the CEA is in France. This is a government that invests in the future. “It’s a good place to be today,” he says. “Many US start-ups are coming to France as a result.”
Lerner reports that eG ViaCoat, which can stand alone as the seed layer process, is being licensed for on‐site qualifications and the AquVia 1st‐generation integrated process for Si‐interposer applications, released July 2009, has begun to generate revenue. We can expect to see additional AquiVia generations to be released this quarter for different TSV applications, as well as additional metallization materials. Lerner also noted that all systems “are go” at 200mm, and 300mm capacity will be available by the end of 2009.
Most importantly for a start-up, investor confidence remains high. The fact that in June of 2009 Alchimer raised the equivalent of $10M in a market considered by many to have been the worst in our lifetime should not go unnoticed. Existing investors continued to add fresh capital in Alchimer, while some of their other portfolio companies were being terminated. New investors also stepped in to take advantage of Alchimer’s increasing momentum in the industry, and new loans became available as a result of the company’s recent performance.
Technology review – eG and cG 101
To preface what we would see in the lab facility, Truzzi offered a brief tutorial explaining the main points of Alchimer’s core technologies: electrografting (eG), which is used for the isolation and seed layers, and chemical grafting (cG), used for the barrier layer. Both are nanotechnologies based on surface chemistry formulations and processes. The wet process techniques operate in standard plating tools and enable self-oriented layer growth of thin coatings of various types, initiated by in-situ reactions between specific precursor molecules and the surface. Unlike deposition processes, the film material is directly synthesized on the surface, rather than being present in the solutions in its final state. While eG is intended to graft dielectrics, metals and seed layers onto conductive surfaces, cG is used to graft films onto non-conductive surfaces.
Performance benefits of AquiVia include superior step coverage, aspect ratio, conformality and adhesion. It is insensitive to scalloping, undercut, and reentrant structures, and film properties meet or exceed current TSV requirements. While it is not suited to via-first applications due to high-temperature processing of subsequent CMOS layers, it is ideal for both via-middle and via-last processes.
According to Truzzi, companies focused on dry deposition processes are limiting design opportunities to those that require only low-aspect ratio structures. But AquiVia’s proven capability to achieve conformal deposition on vias of aspect ratios as high as 20:1 gives designers much more flexibility. To prove this point, the company recently demonstrated that TSVs with aspect ratios of 20:1 can save chipmakers more than $700 per 300-mm wafer compared to TSVs with ratios of 5:1, by reducing the die area needed for interconnection.
Alchimer modeled TSV costs and space consumption using an existing 3D processor stack for mobile applications that includes a low-power microprocessor, NAND memory chip and a DRAM chip using 65nm process technology. The chips are connected by about 1000 TSVs, and the microprocessor die area required for the TSVs was calculated for aspect ratios of 5:1, 10:1 and 20:1. The comparison included the same via depth in all cases. Because, as Truzzi explained, it’s not about the depth of the via but the aspect ratio. Decreasing the TSV diameter at the same depth increases the aspect ratio. The 5:1 scenario consumed 12.3% of die area, while a 20:1 approach consumed just 0.8%. Applying standard cost modeling, Alchimer found a $731 per wafer cost differential between the two.
So now, in addition to offering a 65% cost of ownership advantage over dry deposition process on the latest-generation equipment, AquiVia’s high aspect ratio capabilities also enable chip designers to reclaim valuable silicon real estate, and either reduce overall die size or increase circuitry. Clearly, the argument surrounding adopting Alchimer’s process is shifting from “Why Alchimer?” to “Why Not Alchimer?”. If the industry wasn’t sitting up and taking notice before, it should be now. One thing is certain: the message is out there and the momentum is growing.
This article was sponsored by Alchimer now Aveni
