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The AI Packaging Bottleneck Is a Materials Opportunity

By Julia Woertink, VP of R&D of Semiconductor Technologies at...

Building America’s Capacity to Innovate

From research and development to high-volume manufacturing, Intel is helping...

Scaling Advanced Packaging: Why It Matters

Advanced packaging (AP) is one of the fastest growing segments...

DBC vs. AMB vs. Thick Film – Choosing the Right Ceramic Platform

Practical Guidance for Power, Reliability, and Precision Electronics Selecting the...

Why Hybrid Bonding Is Hard to Perfect

Examples of Hybrid bonding-related imperfections – misalignment, erosion of dielectric,...

Open-Cavity Plastic Packages: A Practical Approach to IC Prototyping

Developing a new IC involves more than designing and fabricating...

Video of the week

Dragonfly G5: Sub‑Micron 2D/3D Inspection & Metrology for Advanced AI Device Manufacturing

Nov 09, 2026

Podcast Highlights

Supply Chain Shortages Driven By Growth in the AI Era

Why Optical High-Volume Test is 10x More Challenging than Electrical High-Volume Test At the Si-Photonics Packaging Summit 2026

Unlike electrical testing for semiconductors, automating optical test is extremely...

See What the IMAPS 59th Symposium on Microelectronics Exhibit Hall Has in Store!

Thank you to our valued IMAPS exhibitors for your continued...

IMAPS 59th International Symposium on Microelectronics: Technical Program and Exhibition Focused on Intelligent Packaging for the AI Era (Heterogeneous Integration & Photonics)

The International Microelectronics Assembly and Packaging Society (IMAPS) will host...

Tackling the Memory Wall at the IMAPS Memory Summit

With the rapidly approaching IMAPS Silicon Valley event, Accelerating Innovation...

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Impact of Solder Powder Size on Cleaning Efficiency in Chip Resistor Assemblies for Future Advanced Packaging

Co-authored by Principal Engineer Ravi Parthasarathy, and Heraeus Presented at...

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